During the process of developing a circuit design, the behavior of the design is simulated based on a specification of the circuit design. Simulating the design helps to verify correct behavior prior to physical implementation of the circuit. Wasted manufacturing costs due to faulty design may thereby be avoided.
Numerous tools are available for simulating circuit designs including, for example, high-level modeling systems (HLMSs) and HDL simulators. Co-simulation may also be used when the design may be more efficiently simulated by simulating different parts of the design on different simulation platforms (“co-simulation platforms”).
Example co-simulation platforms include both software-based and hardware-based systems. In a software-based system, a portion of the design is emulated with software running on a workstation, for example. In a hardware-based system, a portion of the design is emulated on a hardware platform that includes a programmable logic device (PLD) such as a field programmable gate array (FPGA). Co-simulating on a hardware platform may be used to reduce the time required for a simulation run. The Modelsim simulator and the NC-SIM simulator from Cadence are example software-based systems, and the Wildcard development platform from Annapolis Microsystems and the Benone development platform from Nallatech are example hardware-based systems. The WildCard and Benone platforms are often used for algorithm exploration and design prototyping.
Most design tools recognize and support a hierarchical specification of the design, which allows the design to be specified and viewed at different levels of abstraction. The term “block” is sometimes used to refer to a collection of parts of a design that perform a function. Blocks produce outputs as a function of the inputs and internal state, blocks are connected by arcs, and arcs conduct data between blocks. At some level in this hierarchical framework, simulating the design involves moving data from one block of the design to another block of the design.
In some designs both scalar and vector data may be transferred between various blocks. A scalar may be viewed as a single data value, and a vector may be viewed as a set of multiple data values. For example, a vector may be a set of multiple, consecutively addressable scalars, such as an array. In specific applications, a vector may be a two-dimensional array implementing a matrix or frame of data.
Design and simulation issues may arise when one block processes vectors, another block processes scalars, and one of the blocks supplies or uses data from the other block. To provide a vector output from a vector-function block as input to scalar-function block, the vector is serialized into scalars and may be time-multiplexed for input to the scalar-function block. Forcing a designer to deal with implementation-level decisions early in the design stage may be counterproductive.
The present invention may address one or more of the above issues.